A memory operation may include amplifying data stored in respective memory cells through a sense amplifier according to a read command or write command in a state that a bit line and a data line are precharged to a given voltage and to output the data to the outside, or to transfer data input from the outside to data line by using a data write driver and then store the data in a memory cell selected through bit line.
When a read or write operation of the memory is completed, a bit line and a data line should be charged again to a given voltage to be capable of performing a subsequent memory operation.
Hence, to obtain a high speed operation of a memory device, a speed in a read operation and write operation should be optimized. In addition, a speed in a precharge of bit line before and/or after the read and write operation should also be optimized.